Quantum Chip Technology for high-quality Trapped Ions Pilot

This call aims to develop a scalable production infrastructure for trapped-ion quantum computing processors in Europe, transitioning from manually fabricated ion traps to automated manufacturing processes.

The aim is to support one pilot line implemented through a Framework Partnership Agreement establishing a stable and structured long term partnerships between the Chips JU and consortia of industry, research organisations and the institutions in Quantum Technologies who commit themselves to establishing, coordinating and implementing a strategic and ambitious R&I initiative contributing to the development of innovative quantum chips, followed by an ambitious action for building and deploying pilot lines.

The partnership will ensure the implementation of the initiative through several consecutive Specific Grant Agreements (SGAs) that will carry out the different activities in a common framework. The SGAs will be implemented as Research and Innovation Actions (RIA) or Innovation Actions (IA) in function of the concrete objectives of the action. The FPA should be carried out in different phases, which will be triggered after the attainment of appropriate intermediate progress milestones identified by the Consortia. The FPA will permit the coordinated development of the technology, its validation and the nurturing of the ecosystem. The developments should be integrated in at least one pilot demonstrator to validate the developments and demonstrate the scalability potential.

The infrastructures of the pilot line should be installed in a pre-operational environment in the facilities of the hosting entities. The FPA and SGAs should target delivering components for building and deploying in the EU of quantum technologies based on European technology.

The FPA is expected to pursue an inclusive approach in the development of the necessary EU-wide quantum ecosystem, ensuring European wide participation of relevant stakeholders across the EU and take-up of the technology developed.

The FPA should include research institutes, universities, RTOs, industry, including SMEs as well as any other organization that can play a role in the realization of the objectives of the initiative.

The FPA should describe the planned mechanisms guaranteeing that all IP generated in the initiative stays in the EU and will not be transferred to third countries, dedicating an appropriate effort to IP management, protection and exploitation (i.e., IP licensing, IP warranty, etc.).

The FPA should present a professional project structure management, a strategic R&I roadmap to implement the activities, and governance that are appropriate to coordinate the implementation of the future SGAs, including addressing the industrial use cases, and to deliver effectively and efficiently the main results of the initiative.

The FPA should put in place appropriate management and progress control mechanisms, in particular, the establishment milestones for the SGAs and an intermediate main assessment point to assess the correct advancement of the different work lines towards the goals of the overall initiative.

The FPA should establish interaction with the relevant stakeholders and pilot lines, design platform, competence centres of the Chips JU to coordinate work on horizontal issues common to both communities and exploit synergies where relevant.

The FPA is expected to achieve Technology Readiness Level (TRL) 8. The actions implemented under the first SGA are expected to achieve Technology Readiness Level (TRL) 6.

Proposals should address the following activities:

• Integrating fabrication capabilities into mainstream microelectronics or photonics manufacturing processes.
• Microfabrication techniques adaptable for high-yield production of next-generation ion-traps.
• Process design kits (PDKs) for fabricating next-generation ion-traps using standardized building blocks. Integrating cutting-edge PDKs with European virtual design platforms to standardize production and reduce the need for custom developments.
• Integration of advanced features such as segments and junctions, and integrated photonics for addressing, manipulation, and readout in ion-trap chips.
• Enhancing technology (including enabling technologies) and manufacturing readiness levels across the quantum industry, addressing applications in one or more of the following: quantum computing, communications, simulation, and/or sensing.
• Standardization of production processes and development of high-quality ion-traps for diverse applications including quantum computing, quantum communication, quantum metrology, and quantum simulation.
• Demonstration of scalable, efficient, and stable (e.g. high yield) production capabilities. The development of robust and repeatable manufacturing processes tailored to quantum chips' unique requirements, enabling a consistent and reliable supply for European stakeholders.
• Developing reliable characterization tools to ensure quality assurance of trapped-ion chips, ensuring consistency and reliability across production batches, and demonstrating the scalability of pilot line technologies from small-to-mid volume fabrication to potentially large-scale industrial production.
• Define a technology roadmap and implementation plan towards industrialisation of the production of quantum chips.

Proposals should outline strategies for:

• Preparing production sites and procuring advanced manufacturing equipment.
• Extensive testing and quality assurance to align with European quantum initiatives.
• Integrating photonics or electronics into ion-traps, enhancing their functionality at ultrahigh-vacuum or cryogenic temperatures.
• Developing comprehensive production lifecycle processes from design to final assembly and testing, ensuring mass production capability.