Packaging technologies for critical defence components

• Increase level of skill and knowledge in the European Defence Technological and Industrial Base concerning advanced packaging
• Create System-in-Package reference architectures and technological solutions for next generation military systems
• Strengthen the independence and competitiveness of the European supply chain for low-volume technologies and solutions that fulfil military requirements by enabling a heterogeneous integration approach (combining European based semiconductor components and non-European advanced nodes components)
• Enhance security of information by defining adapted test strategies and methods for risk mitigation
• Guarantee the access to packaging services to the EU Member States and Norway
• Promote a collaboration network between EU Member States and Norway including academy, research centres and industry looking for synergies with civil initiatives.

General objective

Future defence systems that target information superiority, new communication capabilities, new battlefield operations, combat capabilities and inter-theatre air operations require electronic components with high performance and multiple functionalities. Systems such as radiofrequency (RF) sensors for radars or electronic warfare systems, intelligent processing platforms or hardware-secured/cyber-secured modules need to be highly integrated and to fulfil specific military requirements. A particular challenge for defence forces is the digital control of the RF spectrum. For example, digital radar equipment will be driven mainly by components like analog-to-digital converters (ADC), digital-to-analog converters (DAC), the RF frontend, which will be mainly characterised by a transmit (high power amplifier - HPA) signal chain and a receiver (low noise amplifier - LNA) signal chain, and a robust switch, setting the mode of operation.

Specific objective

The performance of such a system will not only depend on the performance of the single chips used for each component but also on the quality and efficiency of their integration into packages and the optimization of their interplay with respect to the targeted application. Advanced packaging technologies are key to obtain compact, robust and reliable electronic components by integrating and encapsulating multiple electronic chips. The resulting Multi-Chip Modules and/or System in Packages (SiP) can provide high performance and multiple functions. Packaging with short interconnections between components minimizes parasitic elements that degrade signal integrity. This is particularly relevant for next generation radio-frequency application (e.g., radars or electronic warfare systems). Furthermore, an advanced density of integration allows hiding sensitive signals and integrating protection features, which is relevant for anti-tamper and secure module solutions.

Packaging technologies can also increase the resilience of supply in key technology areas, reducing dependence and improve security of information by allowing the use of components of different technologies and from different sources within a quality and security assured process. This is particularly relevant for defence applications for which securing the EU supply chains of critical electronic components is challenging due to small manufacturing volumes and potential constraints such as export restrictions.

Scope and types of activities

Scope

The topic addresses advanced System-in-Package technologies and architectures that take into account needs of defence systems with a particular focus on radio-frequency applications. It addresses improvement of packaging technologies, the preparation of design tools and the preparation of pilot lines.

The System-in-package should contain various types of elements (e.g., passives, high-speed digital components, ADC, DAC, memory components, microelectromechanical systems (MEMS), optical component) made of different materials (e.g., Si, SiGe, III/V semiconductors such as GaN and GaAs, RF complementary metal-oxide-semiconductor (CMOS)) and produced by different processes (semiconductors technology nodes both manufactured in the EU or Norway and outside.). A package should combine digital and analogue functions and integrate, if adapted to the considered application, further security functions and thermal management functionalities.

Proposals should strive to identify a supply chain from actors from the EU and Norway offering independent OSAT (Outsourced Semiconductor Assembly and Test) services, in order to reinforce an EU and Norway industrial sovereignty independent from any usage constraints. As appropriate, proposals should take into account different technologies (such as Fan-Out Wafer Level-Packaging – FOWLP etc.) for creating the System-in-Package.

Relevant use cases for defence applications include RF sensors (Radar, electronic warfare including high power source for jamming, millimetre wave communications), data security and smart sensors for ammunitions.

Size, weight and power dissipation are of high concern for embedded applications. Moreover, the use in harsh environment should be taken into account. This can include aspects of G-hardening, shocks and thermal conditions, e.g., necessary for gun-launched applications or brutal landing on aircraft carriers.

This topic is linked to the sectoral analysis performed by DG DEFIS and studies performed by EDA in the framework of the CapTech TCM. Synergies between defence, space and civil technologies have to be taken account in order to avoid duplication costs.

Where applicable, proposals should build on skills, technologies and associated industrial capacities that are partially available in EU and Norway for defence or for civil applications. The proposals must substantiate synergies and complementarity with civil initiatives, notably supported by EU programmes in the space sector. It must avoid unnecessary duplications with other EU, intergovernmental or NATO initiatives.

Types of activities

The following types of activities are eligible for this topic:

Among other tasks that the applicants deem necessary, the following tasks must be performed as part of the mandatory activities of the project:

• Integrating knowledge:
  • Research activities on materials (e.g., innovative substrate), interconnect technologies and components for high-performance packaging, including tests of candidate technologies
  • Research activities on the integration of heterogeneous components and necessary interfaces, including experimental testing.
• Studies
  • Evaluation of different modular architectures and targeted platform technologies (such as FOWLP)
  • Identification of chiplets categories needed for relevant defence applications such as RF sensors, digital security, IMU (Inertial Measurement Units), etc.,
  • Definition of relevant chiplet interfaces that enable integration of the chiplets in advanced packaging, taking into account open initiatives focussing on civil applications for standard functionalities.
  • Assessment of requirements and common candidate technologies for a wide range of different defence applications, and specifically the interface between die and package to ease integration of chiplets
  • Definition of a test strategy to ensure safety and security standards for low-volume heterogeneous integration
  • Taking into account the outcome of the design activities, identification of the best supply chain per technology and use case application (sensitive or not) compatible with real production (Manufacturing Readiness Level aspect)

Proposals may additionally include the following tasks under this activity:

• • Study on the set-up and management of a shared library for chiplets
• Design
  • Definition of System-in-Package modular architectures, including those based on chiplets, supporting RF sensors, digital security, inertial measurement units (IMU), etc., and technologies for functions with military specificities
  • Define design methodologies and set up physical design kits (toolbox, modular physical design kits, multi-physics design) for the targeted technology platforms, taking into account the specificities of military systems.
  • Design of physical interfaces for components (or chiplets) that optimize integration in the package.
  • Design of selected common interface protocols for components (or chiplets) that enable reuse and optimize integration in next generation SiP platforms
  • Develop demonstrators of common interface test chips (such integrated passives including switches, protocol bridges and links, test structures…), integrate and test them on a SiP technology demonstrator platform
  • Design of test structures that can ensure safety and security standards for low-volume heterogeneous integration
  • Design of technological demonstrators taking into account the defined use cases
  • Testing in at least two iterations of the technological demonstrators, including reliability tests, for the evaluation on relevant platforms and including a failure analysis, if applicable.
  • Design of a pilot line, including the strategy of test and feasibility tests.

Functional requirements

Proposals should address technologies and solutions that fulfil the following requirements:

• Compatibility with several defence applications, including active electronically scanned array (AESA) radar preferably targeting X-Band and above, electronic warfare including high power source for jamming, millimetre wave communications, data security and smart sensors for ammunitions
• Optimization for radio-frequency applications with high-power, low signal
• Modularity and configurability to meet various requirements of different military applications.
• Optimization of size, weight, cost and power dissipation capability
• Integration of solutions against reverse engineering and enemy observation (like anti tampering and tempest)
• Compliance with the Registration, Evaluation, Authorisation and Restriction of Chemicals (REACH) and Restriction of Hazardous Substances (ROHS) regulations
• Compliance with the military standards (e.g., MIL-STD 810…) for the target applications (e.g., taking into account requirements for aviation certification), in particular with respect to harsh environments, G-hardening, shocks and extreme thermal conditions